FENIX: Enabling In-Network DNN Inference with FPGA-Enhanced Programmable Switches
summary
FENIX implements a hybrid pipeline: a switch-based Data Engine extracts features and uses a probabilistic token bucket to limit feature stream rate, and an FPGA Model Engine runs full DNNs. Implemented on a board integrating a Tofino ASIC and ZU19EG FPGA, it packs feature vectors (not packets) and returns flow labels. Evaluation shows microsecond-level latency, multi-terabit scalable throughput and over 90% accuracy on VPN and malware classification with modest SRAM and FPGA resource use.
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chapters (14)
- 0:00FENIX introduction and motivation
- 1:24In-network DNN inference challenges
- 2:51Hybrid switch-FPGA architecture
- 4:43FENIX hardware design
- 5:47Throughput mismatch solution
- 6:51Flow tracker and rate limiter
- 8:17Model engine and FPGA inference
- 8:59Implementation and prototype
- 9:21Evaluation on VPN and malware
- 10:02Accuracy improvements
- 10:25Latency reduction
- 11:10Scalability and throughput
- 11:52Hardware resource usage
- 12:13Conclusion and future work
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