Chips Alliance Project
summary
CHIPS Alliance organizes corporate-backed open hardware projects under Apache-2.0 license and a Linux Foundation home, with membership tiers (platinum ~$25k, silver ~$5k, auditor ~$2k). Initial, active efforts host RISC-V cores and verification flows: a Verve 9-stage superscalar core is donated and already taped out in a flash controller; cloud verification chains run randomized RISC‑V instruction generators against a Paris golden model and metrics-hosted RTL simulators. Tool stack workgroups standardize Verilator + Cocotb + FuseSoC integration and push toward a full OpenROAD-based open toolchain.
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chapters (15)
- 0:00Introduction
- 6:17What is Chips Alliance
- 14:48Organisational Structure
- 18:05Governance Model
- 19:09Life Cycle Document
- 20:48Membership
- 21:55Events
- 23:24Work Groups
- 24:36Conclusion
- 25:51Future Ideas
- 28:33Verve Core
- 31:25Ethernet Fabric
- 32:13Barbar Fuse
- 32:41VeryLater
- 33:46Berkeley Analog Generator
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