RISC-V and Open Source Hardware BoF
summary
Overview of concrete RISC-V progress: open ISA enables real cores and toolchains, not just marketing. Hands-on items include a 64-core Pioneer board and a $120-ish StarFive/Pine64-style module that benchmarks ~2/3 Raspberry Pi 4, a 40‑slot dev‑board program selecting ~50 recipients, and FPGA flows using ECP5 + Litex/Amaranth. The open silicon stack now includes open PDK (SkyWater 90nm), OpenLane/OpenROAD toolchains, and hobby paths like Tiny Tape Out that produce real chips and dev boards.
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chapters (19)
- 0:00RISC-V and open hardware intro
- 1:03What is RISC-V
- 3:28RISC-V developer boards
- 4:51Linux on RISC-V boards
- 8:01High-performance RISC-V boards
- 9:26Linux-capable RISC-V SoCs
- 12:36Proprietary IP concerns
- 15:45Open FPGA toolchains
- 18:54Open RISC-V cores
- 20:19Open-source silicon flow
- 22:27Zero to ASIC course
- 24:12Chip design tools
- 26:21Google efabless PDK
- 27:53Open MPW program
- 30:58Affordable chip prototyping
- 32:43Tiny tape-out
- 36:13Low-power RISC-V SoCs
- 37:17RISE project
- 39:03RISC-V GPUs status
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