Testing and Remote Access to Embedded System DPI/LVDS Display Output
summary
Builds a home-made FPGA video and signal capture PHY that taps DPI/LVDS at the panel connector, captures full frames including blanking and PWM/sync states, and streams raw samples over USB3 using a modified Cypress FX3 and sigrok flow. Calculates bandwidth (1024×600@60 with margins ≈204 MB/s, 1080p pushes ≈500 MB/s), uses sigrok/gstreamer or a tiny custom reader to visualize per-pixel auxiliary bits and verify precise timing — it works.
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chapters (20)
- 0:00Testing and remote access intro
- 2:30Motivation for custom capture hardware
- 7:08Capture DPI/LVDS directly
- 10:18DPI bus timings and margins
- 13:10What to capture from DPI
- 15:44DPI capture bandwidth needs
- 16:48USB 3 for capture interface
- 17:11Failed UVC webcam emulation
- 21:03FX3 bridge chip approach
- 28:52FX3 logic analyzer firmware
- 30:37FX3 LA clock direction flip
- 31:41Capturing and visualizing DPI
- 36:18FX3 clock loss recovery
- 37:22Quick prototype with dev kit
- 38:04Permanent PCB adapter design
- 39:07LVDS to DPI conversion
- 41:16Dual-link LVDS capture
- 42:42Debug display controller
- 43:03PCB design for LVDS capture
- 43:48Future MIPI DSI capture
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