Processor IP Showcase
summary
Session collates multiple RISC-V IP offers and concrete claims: market research projects RISC‑V ecosystem hitting about $1B with ~50% CAGR; Andes reports >180 licenses and “>1 billion devices shipped per year,” and announces a 27‑series vector core and a superscalar 45 series; Shakti publishes configurable E‑class (3‑stage) and C‑class (5‑stage) cores with 180nm and 22nm tape‑outs that boot Linux; SiFive delivers a core designer web portal and a product ladder (2/3/5/7/8 series, up to triple‑issue 12‑stage OoO); OpenHW plans Core‑V chassis eval SOCs (NXP i.MX, up to 10k boards) for silicon validation.
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