An Introduction to RISC V Boot Flow
summary
Explains how Linux boots on RISC‑V by combining a ROM/FSBL, an openSBI runtime (mandatory for SBI calls like timer and TLB ops), U‑Boot (or direct kernel payload), and Linux; demos use QEMU emulation to avoid ~$1,000 HiFive Unleashed hardware and require a Linux host, a RISC‑V cross‑toolchain, and prebuilt images. Shows exact build steps: compile openSBI, build U‑Boot (SPL or proper), produce FIT images and use firmware-dynamic or firmware‑jump formats; measures overheads and notes BSD‑2 licensing and RV32/64 and hypervisor support.
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chapters (9)
- 0:00Introduction and Setup
- 4:09Development Environment
- 7:00Embedded Boot Flow Basics
- 11:58RISC-V Boot Flow History
- 17:20OpenSBI Overview
- 25:16Tutorial 1: Simple Boot
- 32:44Tutorial 2: U-Boot Integration
- 39:39Firmware Payload Types
- 46:40Tutorial 3: Dynamic Firmware
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