Keynote Panel Opportunity and Risks in Open Source Hardware
summary
Panel argues RISC‑V’s value is the open standard vs open-source hardware distinction and shows concrete effects: full SoC projects can hit $100M+ high-end SoC costs driven by verification and software, while community platforms promise simple embedded chips for tens of thousands (50–60K) and faster FPGA-based iteration. Practical work includes OpenROAD and pushes for open EDA and open FPGA; patent risk remains real but companies offer patent pledges and pools, and governance plus a shared software ecosystem is the proposed guardrail against fragmentation.
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chapters (15)
- 0:00Introduction
- 2:10RISCV vs Open Source Hardware
- 3:25Open Power Foundation
- 6:33Open Source Hardware
- 10:38Building a Custom SOC
- 14:31Opportunities with Open Standards
- 18:49Open Source Software Options
- 22:49Fragmentation Interoperability
- 24:56Design Winds
- 27:34Maintaining Uniformity
- 31:27Governance Lessons
- 34:30Open Standards
- 35:10Reusability
- 39:16Role of Open Source
- 41:51Questions
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