Andes Extended RISC V Features

on YouTube ↗13m

" summary

Andes extends RISC-V with a priority-based preemption CLINT and vectored CLINT that pass interrupt IDs to targets and store 32-bit vector addresses to reach a 4GB range, plus a stack-protection mode that monitors SP and records peak usage. Instruction set adds larger-immediate load/stores, compare/branch-with-const, compressed 16-bit encodings, and a DSP extension (≈130–150 instructions) with 64-bit add/sub/macc, zero-overhead loops and C intrinsics; benchmarks show ~50% cycle reduction on an MP3 decoder and up to 5× speed with compiler optimizations. A custom-instruction framework generates C/RTL/simulator artifacts and test benches automatically.

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" chapters (10)

1. 0:00Introduction
2. 0:18About Andes
3. 1:00Andes extended features
4. 2:15Priority based preemption
5. 6:25Preemption
6. 7:32Stax
7. 8:48Codons
8. 9:40DSP
9. 10:47Codec
10. 11:52Framework

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