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The Ides of RISC-V

Talkat FOSDEM 2021 · on Saturday, 2021-02-06· at 16:00· D.emulator· [embedded-and-hardware, compilers-and-language-design]

Shows how to implement a parallel (vectorized) Caesar cipher in RISC-V assembly and run it in an emulator because the RISC-V vector extension isn’t standardized. Explains and demonstrates using riscv-isa-sim and riscv-pk, and how the emulator can execute a single user-space application despite being designed for whole-system emulation.

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