Trusted RV: 64bit RISC-V TEE with Secure CoProcessor as Root of Trust
summary
A hardware+software secure platform combining four 64-bit RISC-V application cores with a single 32-bit RISC-V secure coprocessor that acts as a root of trust and boots first to store device keys/certificates and verify the main cores. The secure coprocessor runs Zephyr in machine mode and manages secure boot, crypto and certificate verification; the 64-bit cores run Linux with RISC-V Keystone enclaves as the TEE and a Secure Monitor that limits communication so only enclave Trusted Applications can use the shared-memory/interrupt channel to the secure coprocessor (also used for remote attestation). The design is implemented on a Xilinx VC707 FPGA and in a simulator.
AI-written summary · about
related talks
16mTrusted RV: Trusted Execution Environment, Secure Coprocessor, and their Program...
45mThe Future of Security is in Open Silicon
21mTEEP (Trusted Execution Environment Provisioning) on RISC-V
17mA First Secure RISC-V Common Criteria Certified Root of Trust
09mThe Future of Embedded Security with RISC-V
27mZephyr and Trusted Execution Environments
09mDemo: Facilitating Trusted Application Migration to RISC-V
16mKeynote: NVIDIA’s secure RISC-V processor