The Road to the Mainline ZynqMP VCU Driver

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Describes developing an in-kernel V4L2 mem2mem driver (the allegro driver) for the Xilinx Zynq UltraScale+ MPSoC’s Allegro DVT H.264/H.265 Video Codec Unit (VCU), replacing Xilinx’s out-of-tree user-space-library + firmware approach that used custom ioctls and passed physical buffer addresses. Explains how the VCU is accessed from the driver side, why moving to a mainline V4L2 mem2mem driver improves security and integration, and summarizes the driver’s current status and remaining missing features.

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