~/talk

SiFive Intelligence & VCIX

Talkat RISC-V Summit 2022 · 2022-12-13..12-14· [machine-learning, web-performance]
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SiFive ships the Intelligence X280 as a full 64-bit applications core with RVV 1.0 vector support and 32 512-bit vector registers, delivering up to 512 bits of ALU result per cycle and LMUL=8 chaining to 4K-bit vectors. Customers use it as a companion to larger accelerators; SiFive builds a VCIX: 1024b out / 512b in coprocessor interface that cuts round‑trip latency from ~100 cycles to ~10 and raises sustained bandwidth, yields a reported 24× scalar→vector speedup and an extra 6× with AI/ML extensions, plus Recode NEON migration, LLVM auto‑vectorization and tuned libraries.

AI-written summary · about

  1. 0:00Introduction and overview
  2. 1:03SiFive Intelligence X280 core
  3. 3:48X280 companion core use
  4. 5:11Vector coprocessor interface
  5. 8:39Software support for X280
  6. 11:50Cliff Young on accelerators
  7. 19:15Q&A session
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