~/talk

Automatic Test Generation and Verification for RISC-V Vector Extension

links:none on file
name:Xi Wang
links:none on file
slides:none on file

A configurable generator and a Sail-based golden model execute and verify the RISC-V Vector extension with its 217 new instructions and 7 new CSRs, handling 32 vector registers and diverse params like vlen/vsew/vmul. The tool auto-extracts expected results from the Sail model log, emits RISCOF-compatible tests, runs Spike and Sail for RTL/golden cross-checks, and feeds traces to RISCV-ISAC for quantitative coverage; the generated tests and coverage reports successfully validate instruction/configuration combinations.

AI-written summary · about

  1. 0:00Introduction and outline
  2. 0:45RVV and the SAIL model
  3. 3:41Automatic test generator
  4. 6:50Test generation workflow
  5. 11:03ISAC coverage tool
  6. 12:40Demonstration
  7. 14:32Summary and conclusion
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