overview and update
summary
OpenTitan tapes out the Earl Grey engineering sample now in fab with over 30 blocks and nightly regressions running roughly 40,000 tests; repository totals show ~140 unique contributors, 13,000 PRs, 20,000 commits and 1.5M LOC. Ibex is a configurable RV32 core with dual‑core lockstep, configurable caches and PMP, hitting high‑90s coverage on many metrics. A UKRI‑funded Chariot project will ship 100 low‑cost ECP5 FPGA boards for capability research and provide full RTL and schematics.
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chapters (10)
- 0:00lowRISC and open silicon
- 3:09What is Open Titan
- 7:22Open Titan status and plans
- 12:42Other projects
- 13:26Ibex RISC-V core
- 22:34Chariot project with Microsoft
- 27:07Ibex demo and FPGA boards
- 28:52Muntjac 64-bit core
- 30:18Future of open silicon
- 32:47Q&A
related talks
16mThe Future of Ibex - A Production-grade, Open Source 32-bit RISC-V Core
21mThe OpenTitan Project
08mTenstorrent: Extending the RISC-V Open Source Ecosystem
17mOpen-Source HW Commercial Adoption: Lessons Learned
23mIbex and The Mountain of Open Participation: How lowRISC lets everyone participate
10mKeynote: The Open Source Hardware Roadmap
49mBuilding Open Hardware with Open Software
22mOpenRISC update