Module with CologneChip GateMate FPGA
summary
A pocket FPGA module based on the CologneChip GateMate FPGA is built, with PCB and KiCad files released under CERN‑OHL‑P and control code under MIT. The toolkit uses Yosys with GHDL plugin to synthesize VHDL, and a Raspberry Pi 40‑pin GPIO adapter plus an optional SPI/SRAM daughterboard provide power, configuration and memory. Three boards are manufactured and boot from first pass with minor fixes; examples include blinking LEDs, UART loopback and SPI pass‑through.
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chapters (13)
- 0:00FPGA home project intro
- 2:31New FPGA market players
- 6:41Cologne Chip features
- 7:44Custom FPGA model reasons
- 10:15FPGA architecture details
- 13:43FPGA design principles
- 16:56Powering and programming FPGA
- 18:41Control app and platform
- 20:06Toolchain and VHDL
- 21:54Project current state
- 22:38Next steps and experiments
- 23:23Open hardware collaboration
- 24:27Q&A
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