corundum
summary
Corundum implements a 100 GbE NIC on COTS FPGA accelerator cards (e.g., Xilinx Alveo) and supplies RTL components like a PCIe DMA engine, NIC datapath, MAC, PHY plus integration of vendor transceiver and PCIe hard-IP cores. It includes a driver and debugging utility so users with a supported FPGA card and compiler can run experiments, and it is presented as a platform for in-network compute research that supports moving application logic between hardware acceleration and software and experimenting down to lower-layer protocols such as PHY coding.
AI-written summary · about
related talks
18mRoCE BALBOA: Service-Enhanced RDMA Offload Engine for Data Center SmartNICs
22mData transport in a radio telescope: Remote Direct Memory Access over Ethernet from FPGA to GPU
19mFpgaNIC: An FPGA-based Versatile 100Gb SmartNIC for GPUs
49mFPGA: creating hardware by programming
32mFrom UART to PCIe and DMA: Selecting Connectivity for Your FPGA-based Subsystem
19mSwCC: Software-Programmable and Per-Packet Congestion Control in RDMA Engine
55mFabless SoC
27mGNU Radio in a Direct-RF World