From UART to PCIe and DMA: Selecting Connectivity for Your FPGA-based Subsystem
Talkat Embedded Linux Conference @ Open Source Summit North America 2022 · on Thursday, 2022-06-23· at 16:55· Room 201/202 (Level 2), JW Marriott Austin, 110 E 2nd Street Austin, TX 78701·
summary
Compares concrete paths between Linux and FPGA: UART/SPI for low‑bandwidth control, 50 MB/s AXI‑Lite for easy drivers, and PCIe with DMA for bulk transfer at about 250 MB/s per PCIe lane or up to ~700 MB/s with 64‑bit AXI bursts. Demonstrates a tabletop 3D laser scanner with a 5 MP camera producing ~150 MB/s (handled by FPGA binning and ping‑pong buffers), uses UIO/char drivers, free vendor PCIe cores, and open‑source model‑based code generation that successfully produces the C++/VHDL glue.
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chapters (11)
- 0:00Introduction
- 1:18Scenarios
- 5:38Demo Project
- 7:07Software Functionality
- 8:18Outline
- 8:53Physical Layer
- 11:10Hardware Abstraction
- 13:00Advanced PCIe
- 15:14Advanced FPGA PCIe
- 22:34Modelbased source code
- 27:29Conclusion
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