Delving into the Linux Boot Process for an ARM SoC
Talkat Embedded Linux Conference @ Open Source Summit North America 2022 · on Wednesday, 2022-06-22· at 14:35· Griffin Hall (Level 2), JW Marriott Austin, 110 E 2nd Street Austin, TX 78701·
summary
ARMv8 64-bit SoC boot goes ROM to SRAM to main memory with concrete boot stages ROM→SRAM→BL0→BL1, BL0 initializes DRAM and clocks while BL1 loads DTB and kernel, and the bootloader must decompress arm64 kernels because the kernel lacks a decompressor. The kernel expects x0 = DTB physical address and x1–x3 = 0, DAIF masked, MMU off and data cache disabled, instruction cache clean, and the DTB placed with 2MB alignment. Primary entry sets up page tables, enables MMU, then jumps to start_kernel which mounts initramfs and spawns pid 1.
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chapters (4)
- 0:00Start
- 12:49Sample Dissection of a Kernel Image Header Dump
- 17:29Spin Table Method
- 20:26Kernel Subroutine Primary Entry
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