Software Development Trends for FPGAs
summary
FPGA usage is pitched as a general-purpose accelerator that wins for medium-sized integer or bitwise tasks: AES and a Bloom-filter show order-of-magnitude better throughput and power versus CPU/GPU. Development uses an OpenCL toolchain with a Quartus-based offline compiler, an emulator for fast functional testing, and profiling; full hardware builds take hours to compile but tuning (loop unrolling, SIMD, multiple compute units) cuts a test matrix multiply 25→5 ms. Cheap dev boards exist (DE10‑Nano with Cyclone V under $300).
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chapters (11)
- 0:00Start
- 3:40Motivating Examples
- 6:24FPGA Architecture: Fine-grained Massively Parallel
- 8:14Single Instruction on a simple CPU
- 21:50What is OpenCL ?
- 22:59Heterogeneous Platform Model
- 27:43Example Kernel
- 32:28Profiler
- 33:00Area Report
- 34:16Kernel benchmarks
- 36:33Conclusion
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