Leveraging New General-Purpose Registers in the Kernel
summary
APX adds 16 new GPRs in 64‑bit mode and exposes state via XSAVE component 19; compilers already accept an APX flag (GCC mostly ready, LLVM fixing bugs). New encodings enable two‑register push/pop, a hint bit for conditional pop, and an extra output register class. Static compile analysis shows about ~3% static stack savings in some builds but per‑tree changes can exceed 10%. Choices: FPU‑style API with disabled preemption or full entry/exit saving (PTREGS vs XSAVE) and recompiling the kernel breaks legacy compatibility.
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chapters (6)
- 0:00Introduction to APX registers
- 7:34Potential usage models
- 10:30Application approaches
- 21:09Kernel recompilation debate
- 28:15APX-only kernel feasibility
- 33:11Q&A and closing
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