Kernel-Native Packet Processing on AMD GPUs: XDP Offload without Userspace Runtimes
summary
Claims kernel-native XDP offload on AMD hardware by building BPF JITed GPU kernels and submitting them from kernel space via AQL descriptors, avoiding CUDA/ROCm userspace. Implementation uses DMA-BUF and P2P DMA to map NIC rings into GPU VRAM, constructs a single global descriptor queue and AQL kernel dispatch, and compiles BPF to GPU code with a BPF-to-GPU JIT. Prototype runs on GFX9 (Vega 64), hits ~12 megap/s XDP throughput, and currently suffers extra VM copies and ring-buffer bottlenecks.
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chapters (8)
- 0:00Introduction to project
- 2:30Why AMD GPU matters
- 8:15AMD GPU programming basics
- 10:42Control plane design
- 13:58Data plane operation
- 17:29AQL packet structure
- 18:56Current issues and bottlenecks
- 20:20Future work and next steps
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