Solving Pre-silicon Kernel Upstream for RISC-V First Ever
summary
Claims that the Linux kernel for RISC-V can be upstreamed before silicon exist using simulation, FPGA emulation and CI/CD, and shows a real repository (K3) targeting an RV23 chip with a 16‑core, two‑cluster design (performance + AI core). Work finds concrete failures: PCIe/DMA zone and device‑tree fragmentation, dozens of back‑and‑forth patches (one patch resubmitted ~10 times), and a January first‑silicon sample that misses the December merge window, while public repos and maintainer reviews speed fixes.
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chapters (9)
- 0:00Introduction and hardware background
- 1:53Current upstreaming challenges
- 3:20Why RISC-V needs pre-silicon upstream
- 5:11Proposed upstreaming process shift
- 9:08Pre-silicon upstreaming results
- 12:37Open source compliance and maintainer concerns
- 13:20Peripheral subsystem complexities
- 15:27Call for open discussion and collaboration
- 16:34Timeline and availability of RVA23
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28mUbuntu on RISC-V - state of things
31mPanel – Enterprise Linux Enablement on RISC-V
45mLinux on RISC-V--Fedora and Firmware in practice
01h 00mHow to run Linux on RISC-V (with open hardware and open source FPGA tools)
13mA Linux Distribution’s View on RISC-V
27mTuning in-kernel routines on RISC-V
