Cache Aware Scheduling

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" summary

Proposed RFC patches add cache aware scheduling that keeps threads of a process inside the same last-level cache (LLC) domains by adding a new migration type to the node balancer; it computes per-CPU occupancy then picks the process’s preferred ARC and the busiest ARC/CPU to pull runnable threads onto. Microbenchmarks (hackbench, chbench, CPU simulator) show measurable gains but also regressions when the LLC is over-aggregated and saturated. Evaluation uses perf counters/PMU and exposes knobs as debugfs tunables for tuning.

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" chapters (6)

1. 0:00Introduction and background
2. 0:52Current design challenges
3. 3:45Cache-aware balancer design
4. 6:40Benchmark performance results
5. 7:27Feedback and discussion
6. 17:09Implementation considerations