RISC-V DSP (P) Extension Proposal

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" summary

Proposal defines a RISC-V GPR-based SIMD DSP extension (packed 8/16/32-bit lanes plus non-SIMD 16/32/64 ops) with saturation, rounding and fixed-point support, based on Andes V3. Compiler patches for GCC/LLVM plus intrinsics and optimized libraries target embedded use. Measured gains: 54% cycle reduction for Helix MP3 (compiler-only), >70% for G.729 with intrinsics, AMR‑WB up to 4–7× depending on core, libraries average 1.79× (max 5.51×). Task group formation is underway. pair-GPR 64-bit support handles 32-bit implementations.

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" chapters (4)

1. 0:00Start
2. 8:40Real World Applications
3. 8:53Hilux Mp3 Decoder
4. 13:39Compiler Support

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