A Common Software Development Environment for Many-core RISC-V based Hardware and Virtual Platforms
summary
Imperas provides an instruction‑accurate simulator that boots Linux in under 10 seconds on a modeled SiFive U54 class core, models peripherals with real‑time semantics, and scales experiments (tried up to simulated up to 4000 cores). UltraSoC supplies on‑chip analytics IP and a message fabric to extract traces and control hardware. The two products interoperate via standard and extended protocols (they extend RSP for multi‑core), producing a common development environment that unifies simulator visibility and hardware trace/control.
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chapters (7)
- 0:00Introduction and presenters
- 1:01Embedded software challenges
- 3:28Traditional debug limitations
- 5:53Simulation benefits and demo
- 8:37UltraSoC hardware monitoring
- 10:24Common development environment
- 12:09Q&A session
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