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Richard Herveille

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RISC-V DSP (P) Extension Proposal8th RISC-V Workshop Barcelona 20182018-05-07
Proposal defines a RISC-V GPR-based SIMD DSP extension (packed 8/16/32-bit lanes plus non-SIMD 16/32/64 ops) with saturation, rounding and fixed-point support…
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A Practical Implementation Of A Platform Level Interrupt Controller (PLIC)7th RISC-V Workshop 20172017-11-28
A fully functional PLIC implementation claims compliance with the RISC‑V spec while introducing dynamic register/memory map generation so the IP auto-builds a…
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