RISC-V processor IP product line
summary
RISC-V IP lineup targets MCU to application-class SoCs with configurable pipelines and extensions: small 3-stage BM310 32-bit / BM610 64-bit MCUs, deeper-pipeline single- and dual-issue VR series cores, and Linux-capable multi-core bi671 high-performance core (also bi651, bi350). Shipping features include K crypto and B bit-manip extensions (smart meters replace accelerators), DSP B-extension for motor control, PMU with cluster low-power modes, multi-vector interrupts, RTL + testbench + FPGA prototypes and physical implementation services. SPEC2017 OoO core shows up to +69% vs Arm A53 and +41% vs SiFive; OpenSSL up to 14x with crypto extension.
AI-written summary · about
chapters (13)
- 0:00Intro
- 0:13About the company
- 0:57Different classes of processor IP
- 3:19M and VR series
- 4:45Performance
- 6:42Root of trust
- 7:58Digital signal processing
- 9:02BiSeries
- 10:19Power Management
- 11:39Benchmarks
- 12:32Crypto
- 13:00Industrial Automation
- 13:40IP








