RISC-V: Reaching New Orbits in Space Computing

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" summary

ESA reports a concrete roadmap: a RISC‑V SoC called GR765 targets tape-out Q4 this year with prototypes next year, integrating SIMD extensions for GNSS and AI, a NanoExplorer FPGA, GNSS IP, security and SpaceWire/SpaceFibre. A higher‑performance GR7XV is at design stage as a 16‑core RISC‑V with vector unit pending UDSM funding. UDSM funds platform IP at 22 nm and 7 nm, plus microcontroller IP, an instruction‑set simulator, reference flight boards and expanded OBPmark benchmarks.

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" chapters (11)

1. 0:00Introduction and speaker welcome
2. 0:56Why RISC-V for space computing
3. 2:20Radiation and space constraints
4. 4:07Open ISA benefits for space
5. 5:30GR765 RISC-V processor overview
6. 6:54SIMD and space-specific features
7. 7:38European supply chain initiatives
8. 8:20Future high-performance GR7XV plans
9. 9:26Ecosystem and software support
10. 10:29Future architecture and benchmarks
11. 11:53RISC-V’s growing role in space

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