Building a Low-key XIP-enabled RISC-V Linux System
summary
Shows a working pipeline to run Linux code directly from QSPI NOR flash: uses Buildroot + custom XIP patches and a 5.10 kernel image patched locally, with mainline XIP support merged in kernel 5.13 but currently limited to 64-bit, MMU-enabled RISC‑V. Demo boots on the BeagleV target simulated in Renode simulator because the physical board is nonfunctional; BeagleV spec includes 2-core C5 U94, 8 GB DDR, 32 MB NOR. XIP boots successfully in simulation but performance and address-translation branching need optimization; priorities are MMU-less support and kernel compression.
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chapters (11)
- 0:00Intro
- 0:38About me
- 1:41About this presentation
- 3:39RISC-V vs ARM
- 5:56XIP: execute in place
- 7:25Kernel XIP
- 8:49XIP advantages
- 10:31XIP obstacles
- 14:48XIP on RISC-V: current status
- 20:47Beagle V software
- 25:16Conclusions
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