Optimized String Processing in RISC-V: How Toolchain Improvements Can Boost Performance
summary
Claims a concrete code pattern: use RISC‑V bitwise byte ops (example orc.b) and the find-zero trick to detect NUL bytes with two–three instructions instead of ten, yielding up to 147% throughput on one board and ~290% on another in microbenchmarks. Implements changes in GCC and glibc with runtime patching via the IUN/PLT mechanism and Linux HW probe, plus kernel tweaks; handles alignment and page‑crossing to avoid faults. Includes assembly listings and upstream patches (GCC 14 support).
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chapters (19)
- 0:00Optimized string processing intro
- 1:24String functions focus
- 3:10RISC-V and bit extensions
- 4:58String function challenges
- 7:22SIMD in RISC-V P extension
- 8:47Lamport string comparison
- 10:11Zero-byte detection in GCC
- 14:36String optimization strategy
- 15:41Pointer alignment in strings
- 19:00Reducing zero-byte instructions
- 20:31GCC optimization integration
- 22:43glibc IFUNC runtime
- 25:35Benchmarking performance
- 26:37Micro-benchmark length
- 30:32Dhrystone benchmark performance
- 31:38SPEC CPU 2017 results
- 33:04Upstream optimization status
- 34:48Optimizations summary
- 35:10Q&A
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