Secure AVIC: Securing Interrupt Injection from a 'malicious' Hypervisor
summary
Secure AVIC moves the APIC backing page into guest-owned memory and adds Guest Owned APIC Backing Page fields plus allow IR / requested IR registers so the hypervisor must set requested IR and the guest must pre-authorize vectors; hardware checks allowed bits before injecting. Prototype implements self IPI only (self-IPI only) and emulated device interrupt injection, successfully boots to 128 vCPUs. Work remains for NMI and local-APIC timer emulation and for reliable backing-page presence in nested page tables.
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chapters (12)
- 0:00Introduction
- 0:43AVIC and Secure AVIC overview
- 2:11Architecture changes in Secure AVIC
- 3:56Three main focus areas
- 6:49Interrupt injection mechanism
- 8:37Comparison of AVIC modes
- 9:18Guest initialization and detection
- 10:00Guest modifications for allowed IRR
- 11:05Security value of allowed IRR
- 11:52VC Handler optimization discussion
- 12:15Current prototype status
- 13:19Memory management challenges
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