A RISCy Approach to Microprocessor Technology
summary
Berkeley designs a simple RISC ISA in 1980, teaches it through three courses, and sends student layouts to fabrication using in-house CAD, Unix tools and the ARPANET; the resulting student-built silicon implements an ISA surprisingly close to modern RISC-V cores and shows twice as fast as VAX on an 11-program workload. About a dozen people over roughly a year produce the chip, proving simpler instructions plus pipelining and compiler support beat complexity; development uses PROM/ROM-based microcode comparisons and measured cycle-level benchmarks.
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chapters (8)
- 0:00Context and 1981 landscape
- 1:19The state of computing
- 2:40Critique of complex systems
- 4:23Inefficiencies in design
- 5:39Principles of RISC
- 6:49Industry pushback
- 8:03Building the RISC chip
- 13:12Legacy and reflections
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