Keynote: Lightning Round

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Seventeen companies give two- or one-minute updates claiming concrete outcomes: AANA touts RVV23 out-of-order cores and SMT data movers for AI/auto; Axelera ships Metis at 214 TOPS and announces Europa with 3x Metis performance; Tenstorrent declares the Ascalon X RVA23 CPU available now with a development board next year; Nuclei reports ISO 26262 ASIL‑D certification for automotive cores; Breker uses AI to turn the RISC‑V ISA spec into verification plans and test vectors.

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1. 0:00Introduction to lightning round
2. 0:42AANA’s high-performance RISC-V solutions
3. 3:09Andes’ Condor microarchitecture
4. 5:22Accelera’s edge AI chips
5. 7:52Breer’s AI-driven RISC-V verification
6. 9:57Siemens EDA tools for RISC-V
7. 12:28Synopsys RISC-V development tools
8. 13:52TensTorrent’s RISC-V IP and AI hardware
9. 15:37Arteris interconnect IP for RISC-V
10. 17:00CAST’s RISC-V Catalyst program
11. 18:26Deep Computing’s RISC-V laptops
12. 19:54Lauterbach’s RISC-V debug and trace
13. 21:18LowRISC’s open-source silicon projects
14. 22:44Nuclei’s automotive RISC-V IP
15. 24:01Real Intent’s static verification tools
16. 25:26Rise Project’s open-source software
17. 26:50SpaceMit’s RISC-V AI chips
18. 28:15Sci-Fi’s RISC-V system innovations
19. 29:15Closing remarks and applause