How to Write a Retro Arcade Emulator
summary
Builds a working emulator that runs an unmodified Rygar ROM in seconds and ports the design into an FPGA core that eventually boots the actual game. Emulation uses a Z80 CPU model (two Z80s on the board), a 16‑bit 64K address space with memory‑mapped I/O and banked ROMs, and decodes tiled graphics plus sprite priority into a five‑layer pipeline. Implementation reuses chips library and Sokol for graphics, targets the Terra C D10 nano / MiSTer FPGA with external SDRAM, and ships under the MIT license.
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chapters (11)
- 0:00Start
- 6:26Arcade Machine
- 9:23Subsystems
- 12:16Read-Only Memory (ROM)
- 12:56Random Access Memory (RAM)
- 13:43Memory Mapping
- 17:48Tilemap
- 19:47Input
- 20:08Strategy
- 24:04GPU
- 35:00What's Next?
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