Universal Tools for Acceleration, Timing, Integration & Machine Enhancement

on YouTube ↗24m

" summary

Argues that RISC‑V plus FPGA toolchains let teams build and run real accelerators today: demonstrates a tiny USB‑sized RISC‑V board with USB softcore and RGB LED used at Chaos Computer Congress, shows Linux booted on about ten boards, and describes the flow of writing hardware in Python with LiteX/Migen to synthesize a VexRiscv soft CPU, then debugging with QEMU/Renode — all working end‑to‑end for rapid acceleration.

AI-written summary · about

" chapters (33)

1. 0:00Intro
2. 0:17Hasjim Williams
3. 0:55Floods - let's be prepared Kayak
4. 1:47Evolution of Processor Industry - 1990s
5. 2:32Evolution of Processor Industry - Today
6. 3:07Why Instruction Set Matters
7. 3:54Open Software/Standards Work! Standard
8. 4:35RISC-V Base Instructions
9. 5:03RISC-V Extensions
10. 5:30RISC-V Custom Instructions
11. 6:09Compiler Support - New Instructions / Co-processor
12. 6:29Why Open-Source the Freedom Platform? SiFive FOSDEM 2018
13. 7:32RISC-V Community Member - Benefits
14. 8:55Simulation using Verilator
15. 10:01LiteX Provide the infrastructure to create complex SoCs with Python/Migen
16. 10:28Combinational
17. 10:43Finite State Machines
18. 10:57Remote control and debugging in LiteX
19. 11:14Bridge Advantage
20. 11:54LiteX sim & Verilator
21. 14:37Arty Devboard
22. 15:41Glasgow Interface Explorer / Scotts Army Knife
23. 16:02MicroPython and CircuitPython
24. 16:44Bare-Metal C
25. 17:24QEMU
26. 18:34SymbiFlow - Reverse Engineered FPGA Bitstreams
27. 18:50Accelerate your design
28. 19:20x86-64 Surfboard
29. 19:31Dual ARM powered
30. 20:18HAL 9000
31. 20:40Carl's Draperies
32. 22:42Holoverse - Dinosaurs
33. 23:26Hewlogram

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