UMI: Universal Memory Interface
summary
UMI is a transaction‑based memory interface that replaces wide wire buses with packetized request/response messaging, claiming to scale to chiplets and SoP designs while cutting pin count. It ships as open source RTL and Python drivers plus a machine‑readable spec and integrates with Switchboard and Silicon Compiler for full flow. The project already results in four chiplets taped out in 12 nm and a bootable quad‑core RISC chiplet, using a 512‑bit data / 64‑bit address transaction layer.
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chapters (27)
- 0:00Intro
- 0:48Memory Access Standards
- 1:00Why Umi
- 2:00Umi Standard
- 2:29Chiplets
- 3:35Chiplet breadboard
- 4:21Communication
- 4:44Chiplet
- 5:28Chiplet space
- 6:13Protocols
- 7:05R packets
- 8:17Robust handshakes
- 8:59Communication stack
- 9:42Transaction layer
- 10:41Order
- 11:05Commands
- 11:29Edgar Graf
- 12:00Chip level interface
- 12:33handshake
- 12:58link layer
- 13:42spec
- 16:08Brick demo
- 17:01Open Source projects
- 17:35Mechanical standard
- 18:31Pin planning
- 19:58Questions
- 20:48Which Layer
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