Tiny Tapeout: custom silicon open to all
summary
Tiny Tapeout provides inexpensive, educational chip runs that take Verilog to manufactured silicon using open Lane/open road toolchains, Magic and xschem/xcam workflows, with GitHub Actions automating GDS generation. Projects can be multiple tiles (up to 8×2 shown) run at tens of MHz (demo boards hit ~60 MHz) and use an rp240 MCU carrier for configuration and UF2-flashable SDK work. Users get one physical chip by default; power-gating limits noisy designs; several mixed-signal tapeouts complete and some chips already returned.
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chapters (10)
- 0:00Welcome
- 1:24What Tiny Tapeout is
- 2:50Who Tiny Tapeout is for and its community
- 4:57Tiny Tapeout 3 experience
- 7:04Tiny Tapeout 4 updates
- 9:33Demo boards & RP2040
- 12:44Tiny Tapeout 6 milestones
- 14:34Analog mixed-signal chips
- 15:40Business model & sustainability
- 16:45Q&A
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