Open source chip design: for fun and for profit
summary
Company runs an open toolchain and claims production use of multiple projects including SiliconCompiler 2,000 commits 830 files, a cloud co‑simulation platform called Switchboard drag‑and‑drop chiplet platform that demos wafer‑scale simulation on AWS F1, and an open bitstream FPGA family with working Lattice‑style lot4/lot6 generators. SiliconCompiler nears 1.0, refactors for composability, and uses pip packaging. New synthesis recipes improve Yosys results substantially; OpenSTA now reads VTR SDFs to give full SDC support. Benchmarks and a new open project are published.
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chapters (7)
- 0:00The case for chiplets
- 2:44Switchboard and open FPGA
- 5:17SiliconCompiler 1.0
- 8:24Wildebeest FPGA synthesis
- 11:13Timing analysis and benchmarks
- 13:00Community collaboration
- 14:16Q&A and concluding remarks
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