Open source tools for faster, traceable and reliable development and verification
summary
Shows how to connect a suite of open source tools to produce code, docs, tests and coverage from one project and a sample design: register specs generate RTL and Renode functional models via PeakRDL, block aggregation and editable diagrams come from topwrap and Pipeline Manager, UVM agent and testbench skeletons come from uvmdvgen, and test plans, results and aggregated coverage feed into testplanner and coverview so diagrams link straight to implementations and failing tests.
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chapters (11)
- 0:00Introduction
- 1:45Visualizing designs
- 2:27Planning tests
- 3:53Design aggregation
- 5:20Register definition
- 5:41Generating UVM code
- 7:10Accelerating simulation
- 8:12Mapping test plans
- 9:18Verifying coverage
- 10:25Tool integration
- 11:28Q&A
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