Keynote: Domain-Specific Memory Management?
summary
Argues that PIM must be treated as PIM-as-memory not an accelerator, because treating it as an accelerator wastes capacity (Samsung PIM prototypes remove ~1/3 of per-layer memory). Describes building Giannis unified memory that places PIM and MPU memory together to avoid costly copies and improve model fit, and a domain-specific interconnect (HPCA paper) that enables DPU-to-DPU communication; experiments show scalability collapses when thousands of DPUs spend most time on host-mediated IO rather than compute.
AI-written summary · about
chapters (13)
- 0:00Introduction
- 2:29Domain-specific PIM overview
- 10:11PIM architecture challenges
- 15:49PIM: accelerator or memory?
- 20:24Memory-centric unified systems
- 23:15PIM with accelerators
- 27:30PIM locality concept
- 31:23Domain-specific PIM interconnects
- 34:16Memory management in PIM
- 36:43Dynamic PIM for LLM inference
- 38:09Emerging memory technologies
- 41:19Summary and open questions
- 43:29Q&A
related talks
52mByte-Addressable Persistent Memory and DBMS
41mBreaking and Securing Memory Isolation in Texas Instruments Microcontrollers
35mZephyr OS Memory Protection
25mUMI: Universal Memory Interface
11mUnderstanding and Tackling the Hidden Memory Latency for Edge-based Heterogeneous
25mPIkit: A New Kernel-Independent Processor-Interconnect Rootkit
19mSetMP: Set Associative Mapping Management for Multi-plane Optimization in SSDs
38mDynamic Data Structures and Memory Management on GPUs