Support TVM QNN Flow on RISC-V with SIMD Computation
summary
Compiles quantized (int8) models with TVM QNN flow and replaces convolution kernels with LLVM intrinsics mapped to RISC-V Superword and Subword SIMD, using TVM tensorization to emit vectorized primitives. Runs on Spike and an NDIS cycle-accurate simulator, benchmarks MobileNet v1/v2 and Inception v3/v4, measures instruction-count reductions of 1.79–7.58x versus FP32, and evaluates accuracy on 1k ImageNet images showing acceptable loss. Implementation modifies TVM schedules and LLVM backend to target RISC‑V P extension SIMD.
AI-written summary · about
related talks
17mExploring Static Code Generation and SIMD-Acceleration for Machine Learning on RISC-V
28mAn Efficient Implementation of TensorFlow Lite for RISC-V Vectors
24mMoving to RISC-V Vector: A Practical Journey of AI Operator Optimization
16mAccelerate HPC and AI Applications with RVV Auto-Vectorization
13mKeynote: Taking RISC-V Intelligence Everywhere
01h 45mPorting SIMD to RISC-V Vectors | Corrected Audio
40mHands-on TinyML Deployment on RISC-V: Building an Optimized Edge AI Pipeline - Corrected Audio
19mRISC-V: Changing the Way AI/ML Accelerators and Computing Infrastructure Are Built
