~/talk

Optimizing RISC-V Custom Instructions with Software Driven Analysis and Profiling

Talkat RISC-V Global Forum 2020 · on Thursday, 2020-09-03· at 13:05· MeetingPlay, Virtual Event· [developer-experience]
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Imperas simulation environment profiles a ChaCha20-style C workload (about 2 billion instructions executed) using instruction-accurate runs and cycle-approximate timing; adding four RISC‑V custom opcodes implemented via the Morph API replaces C sequences, reduces wall time from ~20s to ~7s (and to ~9s with a modeled 2‑cycle latency), and cuts the hot process_line 14% of total time while supporting tracing, source-level debug, coverage and per-instruction profiling.

AI-written summary · about

  1. 0:00Introduction to Imperas tools
  2. 5:15Demo walkthrough begins
  3. 15:42Analyzing custom instructions
  4. 20:02Implementation in full fabric
  5. 29:10Summary and key takeaways
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