Software-driven Hardware in the Data Center: LibreBMC, Renode, RowHammer...
summary
Open source FPGA BMC implemented as a LibreBMC FPGA dcscm module runs Zephyr or Linux, supports external TPMs and migrates between Artix7 and ECP5 with full design files available. System-level simulation uses Renode co-simulation with Verilator to model LiteX peripherals, multiple CPU cores including MicroWatt, and accelerate security and ML accelerator testing. An open RowHammer testbed with LPDDR4 and DDR5 in progress uses FPGA DRAM controllers and already reproduces the half‑double attack and published results.
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chapters (12)
- 0:00Intro
- 1:18POWERING DATA CENTERS WITH OPEN SOURCE
- 2:17OPEN SOURCE, FPGA-BASED BMC: MOTIVATION
- 4:03FULLY OPEN SOURCE BMC
- 5:53ARTIX DC-SCM STATUS
- 8:42SOFTWARE-DRIVEN HW DESIGN FOR DATA CENTERS
- 9:47SIMULATION OF LIBREBMC
- 11:14ML ACCELERATION DEVELOPMENT
- 12:14OPEN SOURCE IP FOR SECURITY RESEARCH
- 13:10MITIGATING ROWHAMMER
- 13:53DATA CENTER DRAM TESTER BOARD
- 14:32SUMMARY
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