Post-Efabless Silicon on SkyWater, GlobalFoundries, and IHP
summary
Five chips are submitted to Cadence’s first Sky130 shuttle to recover tapeouts lost after Efabless shuts down, then designs are ported to GF180MCU on Wafer.Space and SG13CMOS5L on IHP. SkyWater tightens metal density and non‑waivable rules forcing an SRAM core redraw and trashing some tiny‑tapeout analog blocks; Panamax is built as a 130‑pin open pad frame and a Caravel‑compatible GF open frame runs a PicoRV32 with hand‑made 3.3V SRAM and IO level shifters. Chips are back packaged but measured results are pending.
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chapters (11)
- 0:00Introduction
- 1:24Efabless shutdown impact
- 2:49SkyWater process challenges
- 6:00Recovering tiny tape-outs
- 8:03Analog IP projects overview
- 9:49Efabless assets revival
- 10:52Porting tools to GF180 MCU
- 13:42GF180 PicoRV32 demo
- 14:45IHP CMOS 5L analog designs
- 16:09Open-source silicon opportunities
- 16:30Q&A
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