Improving Equality Saturation for EDA via Semantic E-Graphs
summary
Introduces semantic e-graphs as an e-graph variant that encodes semantic IDs to link word- and bit-level hardware representations, and implements Nextmap, an equality-saturation-based synthesizer that runs optimization and technology mapping together. Nextmap recovers cross-level sharing, beats Ulysses across resources (e.g., ~25 fewer DSP on scaled suites), matches commercial quality on many designs, handles a 400k-wire design in ~32 minutes, and outperforms fixed-order pipelines in ablation.
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chapters (9)
- 0:00Equality saturation for EDA
- 1:05Semantic e-graphs in hardware synthesis
- 3:57Phase ordering problem
- 7:13Semantic e-graphs for EDA
- 11:23NetMap architecture
- 13:29Technology mapping in NetMap
- 15:34NetMap evaluation
- 17:01Conclusion and future work
- 17:46Q&A
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