Overview of I3C
summary
Explains practical I3C details: standard data rate at 12 MHz (DDR ~25 MHz, ternary ~33 MHz), dynamic addresses assigned at init from a 48‑bit provisional ID, in‑band interrupts where targets broadcast and the controller queues an IBI into workqueue for handling. Describes Zephyr APIs, device tree layout, i3c_device descriptor use, and partial upstream support (RT600/RT500, Synopsys/Cadence IP, STM32H5 mentions, experimental nRF) plus open PRs for shell and Synopsys driver. Notes missing items: full timing modes, high‑data‑rate/CRC handling, controller‑handoff and USB‑I3C mostly unimplemented.
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chapters (4)
- 0:00I3C protocol overview
- 8:52I3C integration in Zephyr
- 23:44Future I3C development
- 24:04Q&A and hardware discussion
