Overview of I3C
summary
I3C is described as a practical upgrade to I2C with 12 MHz standard rate and common faster modes (DDR ≈25 MHz, tertiary ≈33 MHz), dynamic address assignment instead of static addressing, and in-band interrupts (IBI) plus hot-join and CCC broadcast commands. Zephyr already adds an i3c subsystem: device-tree macros, i3c device descriptors, API helpers, IBI callbacks queued to workqueues, and nested i2c compatibility. Remaining work: H‑data‑rate support, shell commands, controller handoff/timing control, and more upstream controller drivers and device bindings.
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chapters (7)
- 0:00I3C overview
- 2:29I3C vs I2C differences
- 8:57I3C in Zephyr RTOS
- 16:46I2C backwards compatibility
- 23:57I3C device support plans
- 30:19Advanced I3C features
- 34:59I3C adoption Q&A
