SoC Development: From ROM to Application
summary
Zephyr runs end-to-end on a Synopsys ARC AE48 AP with RISC-V EHSM and CEVA SDR DSPs, handling ROM bootloader zero, bootloader one, and the V2X app so the same drivers and image-loading libraries link across stages. Development uses hardware emulator, slow simulator, and x86 software sim; two tapeouts and two bringups are already done and a third tapeout is imminent. Notable outcomes: Zephyr across ROM, bootloader, application, two tapeouts and two bringups, implemented ICCM ROM memcpy/memset in assembly, and found/fixed ARC reset and Synopsys cache bugs.
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chapters (14)
- 0:00Introduction
- 1:07Gen 3 SoC overview
- 3:42Autotalks Gen 2 to Gen 3
- 5:48V2X technology explained
- 8:36SoC boot flow
- 11:27Zephyr for SoC development
- 13:13Source tree structure
- 14:38Pre-silicon challenges
- 17:52Secure boot with HSM
- 19:16High-performance ROM
- 23:09Memory optimization
- 24:56Debugging bugs
- 27:45Shared memory challenges
- 29:11Summary
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