On Temporal Verification of Stateful P4 Programs
summary
Introduces P4LTL, a packet-processing LTL for expressing safety (e.g., no implicit drops when a register count is in-range) and liveness (per-port activation under infinite valid packets) over stateful registers, and defines a Büchi transaction that advances the spec only per-packet. Implements prototype p4tv, evaluates on nine nontrivial stateful P4 programs with 19 verification tasks, and reports p4tv solves all tasks while BF4, P4V, Vera and Acula fail or produce spurious counterexamples due to register overapproximation.
AI-written summary · about
chapters (8)
- 0:00Introduction
- 1:18SDN and P4 background
- 3:02Existing P4 verifier limits
- 5:10Stateful P4 verification challenges
- 6:15Modeling with P4LTL
- 9:11Büchi transaction verification
- 12:21P4TV prototype evaluation
- 14:31Summary
related talks
18mLiveness Verification of Stateful Network Functions
22mDependently-Typed Data Plane Programming
01h 01mNetwork Verification: Past, Present, and Future
25mFormal Verification of a Software Defined Delay-Tolerant Network
27mPetr4: Formal Foundations for P4 Data Planes
19mP4R-Type: A Verified API for P4 Control Plane Programs
19mHOL4P4: mechanized small-step semantics for P4
25mP4-SpecTec: A Language Mechanization Framework for P4
