Machine Learning for Manycore System Design and Optimization
summary
Survey of manycore basics and concrete problems: shows task mapping and network-on-chip as combinatorial searches whose evaluations need expensive cycle‑accurate simulation, uses 64‑core 3D experiments (4 dies) with Splash/ParSEC workloads and traffic heatmaps from simulators. Proposes ML solutions: active learning / Stage and MOVE‑Stage for local search (Stage reaches good designs in minutes; MOVE‑Stage gives ~9x speedup, converging in ~11h vs ~95h), and Bayesian optimization with GP/RF surrogates to pick simulations efficiently.
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chapters (15)
- 0:00Introduction
- 1:25Evolution of manycore systems
- 6:03Manycore design challenges
- 14:57Task mapping challenges
- 20:58Machine learning for optimization
- 26:13ML fundamentals for hardware
- 35:46Communication-aware task mapping
- 42:05NoC design challenges
- 54:29ML for manycore optimization
- 1:01:10ML paradigms for automation
- 1:11:03Design space exploration
- 1:22:05STAGE algorithm
- 1:30:27Bayesian optimization
- 1:41:06Key takeaways
- 1:45:25Q&A
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